Schedule Help Center
Lectures and assignments are released on Friday's at 11:00 p.m. EDT per the schedule below. Please note that slide decks, which are grouped by logical content, sometimes cover two lectures.
H&P5 = Computer Architecture: A Quantitative Approach (5th Edition), 2011
H&P4 = Computer Architecture: A Quantitative Approach (4th Edition), 2007
S&L = Modern Processor Design: Fundamentals of Superscalar Processors (1st Edition), 2005, reissued 2013.
PS = Problem Set
| Date | Video Lecture | Reading | Slide Decks | Assignments |
|---|---|---|---|---|
| Sept. 19 | L0 - Course Introduction | |||
| L1 - Instruction Set Architectures, Microcode | H&P5 Chapter 1 (H&P4 Chapter 1),
H&P5 Appendix A (H&P4 Appendix B) |
|
PS1 Released; PS 1A | |
| L2 - Pipelining Review | H&P5 C-1 - C-26, C-30 - C-58, C-61 - C-81
(H&P4 A-1 - A-54, A-56 - A-77) |
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| Sept. 26 | L3 - Cache Review | H&P5 B-1 - B-40 (H&P4 C-1 - C-38) |
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| L4 - Superscalar 1 | H&P5 147 - 192, 197 - 202, 207 - 221,
(H&P4 66 - 114, 118 - 121, 126 - 130, 154 - 170) S&L 177 - 367, Tomasulo Algorithm |
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| Oct. 3 | L5 - Superscalar 2 & Exceptions | H&P5 C-43 - C-61 (H&P4 A-37 - A-56) |
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PS1 Solutions Released; PS2 Released |
| L6 - Superscalar 3 | ||||
| Oct. 10 | L7 - Superscalar 4 |
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| L8 - VLIW 1 | H&P5 192 - 196 (H&P4 114 - 118), Appendix H |
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| Oct. 17 | L9 - VLIW 2 |
Midterm Exam Released
PS3 Released |
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| L10 - Branch Prediction | H&P5 C-26 - C-30
(No corresponding content in H&P4), S&L 219 - 237, 453 - 508 |
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| Oct. 24 | L11 - Advanced Caches 1 | H&P5 71 - 105 (H&P4 288 - 315 ) |
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| L12 - Advanced Caches 2 | ||||
| Oct. 31 | L13 - Memory Protection | H&P5 B-41 - B-67, 105 - 144
(H&P4 C-38 - C-58, 315 - 354) |
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Midterm Due; Midterm Evaluation Start
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| L14 - Vector Processors and GPUs | H&P5 Chapter 4
(No corresponding content in H&P4) |
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| Nov. 7 | L15 - Multithreading | H&P5 221 - 259 (H&P4 170 - 192) |
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| L16 - Parallel Programming 1 (Synchronization, Fences) | H&P5 386 - 400 (H&P4 237 - 249) |
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| Nov. 14 | L17 - Parallel Programming 2 | Midterm Peer Evaluation Due | ||
| L18 - Small Multiprocessors | H&P5 343 - 378 (H&P4 196 - 230) | |||
| Nov. 24 | PS4 Solutions Released; PS5 Released; PS 5A | |||
| Nov. 28 | L19 - Multiprocessor Interconnect 1 | H&P5 Appendix F |
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| L20 - Multiprocessor Interconnect 2 | On-Chip Networks Book Chapter | |||
| Dec. 5 | L21 - Large Multiprocessors (Directory Protocols) | H&P5 378 - 386, 400 - 429
(H&P4 230 - 237, 249 - 284) |
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Final Exam Released
PS5 Solutions Released |
| Dec. 19 | Final Exam Due; Final Exam Evaluation Start | |||
| Jan. 9 | Final Exam Evaluation Due |
Created Fri 20 Sep 2013 1:06 AM CEST
Last Modified Fri 5 Dec 2014 9:12 PM CET
Last Modified Fri 5 Dec 2014 9:12 PM CET